1. Field of the Invention
The present invention relates to a field-effect transistor (hereinafter, referred to as an “FET”) used in a microwave band. In particular, the present invention relates to a GaAs power FET element having an internal matching circuit.
2. Description of the Related Art
There is an increasing demand for a GaAs FET as a device for mobile communication equipment such as a mobile phone, due to its excellent high-frequency characteristics. Particularly, a GaAs power FET is applied, as an amplifier of power for transmission, to a base station as well as a terminal of a mobile phone, and such an FET contributes to the miniaturization and low power consumption of the base station due to its high-output and high-efficiency characteristics. In the present specification, various high-frequency devices such as a power FET, a low-noise FET, and a mixer will be referred to collectively as a high-frequency semiconductor device.
Hereinafter, a conventional high-frequency semiconductor device will be described.
FIGS. 12A and 12B are schematic views of a conventional GaAs power FET element having an internal matching circuit. FIG. 12A is a plan view showing the inside of the FET element, and FIG. 12B is a cross-sectional view taken along a line E-E′ in FIG. 12A.
In FIGS. 12A and 12B, a package 17 has a configuration in which a frame 16 made of ceramic is welded to a bottom portion 13 mainly made of copper. The bottom portion 13 is plated with gold. FET chips 1a and 1b are mounted substantially at a central portion of the package 17. An incoming dielectric substrate 91 made of ceramic is mounted on an input side of the FET chips 1a and 1b. An incoming distributed constant line 93 is formed on the surface of the incoming dielectric substrate 91. An outgoing dielectric substrate 92 is mounted on an output side of the FET chips 1a and 1b. An outgoing distributed constant line 94 is formed on the surface of the outgoing dielectric substrate 92. An input terminal 10 and the incoming distributed constant line 93 are connected electrically to each other via bonding wires 19. Similarly, the incoming distributed constant line 93 and the FET chips 1a, 1b; the FET chips 1a, 1b and the outgoing distributed constant line 94; and the outgoing distributed constant line 94 and an output terminal 12 respectively are connected to each other via the bonding wires 19.
In order to obtain a high-frequency power from the power FET, it is required to form an input impedance matching circuit and an output impedance matching circuit outside of the power FET so as to reduce the reflection of a high-frequency power.
Since the total gate width of the FET chips 1a and 1b is very large, the input and output impedances thereof are very low (i.e., 1 Ω or less). Thus, when it is attempted to obtain an impedance matching circuit directly in such a low impedance state, optimum matching conditions are not obtained, and a power loss becomes very large. In order to obtain power from the FET efficiently, it is important that the impedance of the FET is once converted to a high level (about 10 Ω). In general, the incoming distributed constant line 93 and the outgoing distributed constant line 94 also are called internal matching circuits and designed so as to realize such impedance conversion.
An abnormal oscillation, which can be a serious problem in using the power FET element, will be described below.
In the FET elements in FIGS. 12A and 12B, the case where there is a variation in a threshold value (Vth) and a mutual conductance (gm) between regions M and N of the FET chip 1a will be considered. For example, in the case where a high-frequency power output from the region M of the FET chip 1a is larger than that output from the region N, a roundabout power 96 is generated on the outgoing distributed constant line 94. The roundabout power 96 becomes a reflection power to the region N, whereby the impedance on the output side seen from the region N is changed. More specifically, a difference in impedance on the output side is caused between the regions M and N. As a result, a power imbalance further is increased, resulting in an abnormal oscillation. According the actual measurement, when there is a difference of 0.2 V in a threshold voltage between the regions M and N, an abnormal oscillation was caused in the vicinity of the maximum output.
Next, the case where there is a variation in Vth and gm between the FET chips 1a and 1b will be considered. For example, in the case where a high-frequency power output from the FET chip 1a is larger than that output from the FET chip 1b, a roundabout power 97 is generated on the outgoing distributed constant line 94. When the roundabout power 97 is generated, a reflection power to the FET chip 1b is increased, resulting in a change in impedance on the output side seen from the FET chip 1b. More specifically, a difference in impedance on the output side is caused between the FET chips 1a and 1b, and the difference in high-frequency power to be output further is increased. A power imbalance is increased, resulting in an abnormal oscillation.
The abnormal oscillation is caused not only when the FET chips 1a and 1b are varied, but also when an imbalance is likely to be caused in an operation of the FET chips 1a and 1b (e.g., under a transient condition (during power-on) or when an unnecessary signal is input instantaneously). When an abnormal oscillation is caused, an interference wave not only has an adverse effect on radio communication, but also damages the FET element, which is a serious problem in terms of reliability.